Guide to RISC Processors: For Programmers and Engineers Tapa dura - 2005
de Sivarama P. Dandamudi
Primera línea
Computers are complex systems.
Descripción de contraportada
Recently, there has been a trend toward processor design based on the RISC (Reduced Instruction Set Computer) model: Example RISC processors are the MIPS, SPARC, PowerPC, ARM, and even Intel's 64-bit processor Itanium.
This guidebook provides an accessible and all-encompassing compendium on RISC processors, introducing five RISC processors: MIPS, SPARC, PowerPC, ARM, and Itanium. Initial chapters explain the differences between the CISC and RISC designs and clearly discuss the core RISC design principles. The text then integrates instruction on MIPS assembly language programming, thereby enabling readers to concretely grasp concepts and principles introduced earlier. Readers need only have a basic knowledge of any structured, high-level language to obtain the full benefits here.
Features:
*Includes MIPS simulator (SPIM) download instructions, so that readers can get hands-on assembly language programming experience
*Presents material in a manner suitable for flexible self-study
- Assembly language programs permit reader executables using the SPIM simulator
- Integrates core concepts to processor designs and their implementations
- Supplies extensive and complete programming examples and figures
- Contains chapter-by-chapter overviews and summaries
* Provides source code for the MIPS language at the book's website
Guide to RISC Processors
provides a uniquely comprehensive introduction and guide to RISC-related concepts, principles, design philosophy, and actual programming, as well as the all the popular modern RISC processors and their assembly language. Professionals, programmers, and students seeking an authoritative and practical overview of RISC processors and assembly language programming will find the guide an essential resource.Sivarama P. Dandamudi is a professor of computer science at Carleton University in Ottawa, Ontario, Canada, as well as associate editor responsible for computer architecture at the International Journal of Computers and Their Applications. He has more than two decades of experience teaching about computer systems and organization.
Key Topics
* Processor design issues
* Evolution of CISC and RISC processors
* MIPS, SPARC, PowerPC, Itanium, and ARM architectures
* MIPS assembly language
* SPIM simulator and debugger
* Conditional execution
* Floating-point and logical and shift operations
* Number systems
Computer Architecture/Programming
Beginning/Intermediate Level
Detalles
- Título Guide to RISC Processors: For Programmers and Engineers
- Autor Sivarama P. Dandamudi
- Encuadernación Tapa dura
- Edición U. S. EDITION
- Páginas 388
- Volúmenes 1
- Idioma ENG
- Editorial Springer, New York, NY
- Fecha de publicación 2005-02-16
- Ilustrado Sí
- Features Bibliography, Illustrated, Index
- ISBN 9780387210179 / 0387210172
- Peso 1.91 libras (0.87 kg)
- Dimensiones 9.5 x 7.24 x 0.95 pulgadas (24.13 x 18.39 x 2.41 cm)
- Library of Congress subjects Computer architecture, Assembler language (Computer program
- Número de catálogo de la Librería del Congreso de EEUU 2004051373
- Dewey Decimal Code 004.3
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